Press n or j to go to the next uncovered block, b, p or k for the previous block.
| 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 | 13x 17x 17x 17x 17x | /**
* RegisterGenerator - ADR-004 Register Binding Generation
*
* Generates C #define macros from C-Next register declarations.
* Registers map named memory locations to typed volatile pointers.
*
* Example:
* register GPIO7 @ 0x42004000 {
* ro u32 DR @ 0x00;
* wo u32 DR_SET @ 0x04;
* }
* ->
* // Register: GPIO7 @ 0x42004000
* #define GPIO7_DR (*(volatile uint32_t const *)(0x42004000 + 0x00))
* #define GPIO7_DR_SET (*(volatile uint32_t*)(0x42004000 + 0x04))
*/
import * as Parser from "../../../../logic/parser/grammar/CNextParser";
import IGeneratorInput from "../IGeneratorInput";
import IGeneratorState from "../IGeneratorState";
import IGeneratorOutput from "../IGeneratorOutput";
import IOrchestrator from "../IOrchestrator";
import TGeneratorFn from "../TGeneratorFn";
import generateRegisterMacros from "./RegisterMacroGenerator";
/**
* Generate C #define macros from a C-Next register declaration.
*
* ADR-004: Registers provide hardware abstraction with access control.
* Access modifiers: ro (read-only), wo (write-only), rw (read-write default)
*/
const generateRegister: TGeneratorFn<Parser.RegisterDeclarationContext> = (
node: Parser.RegisterDeclarationContext,
_input: IGeneratorInput,
_state: IGeneratorState,
orchestrator: IOrchestrator,
): IGeneratorOutput => {
const name = node.IDENTIFIER().getText();
const baseAddress = orchestrator.generateExpression(node.expression());
const lines: string[] = [
`/* Register: ${name} @ ${baseAddress} */`,
...generateRegisterMacros(
node.registerMember(),
name,
baseAddress,
orchestrator,
),
"",
];
return {
code: lines.join("\n"),
effects: [],
};
};
export default generateRegister;
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